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Slides of "How to write a good JSSC paper" (PDF)
Program at a glance (PDF)
Preliminary Advance Program （PDF）
Tutorial Abstracs (PDF)
Program
The IEEE Asian Solid-State Circuits Conference (A-SSCC) is an international forum for presentation of advances in solid-state circuit design technologies. This annual conference is fully supported by the IEEE Solid-State Circuits Society (SSCS), and is traveling around Asian countries. The A-SSCC offers a unique opportunity for engineers, researchers, and business leaders to come together and explore the future of circuit design technologies, as well as to stay on-site and feel the breath of Asian countries in the rapidly globalizing IC industry.
Noteworthy Technical Papers
"A 2.0Vpp Input, 0.5 V Supply Delta Amplifier with A-to-D Conversion"
"A 2.4GHz 40mW 40dB SNDR/62dB SFDR 60MHz Bandwidth Mirrored-Image RF Bandpass ΣΔ ADC in 90nm CMOS"
"On-Chip Clock Network Skew Measurement using Sub-Sampling"
"A 15-20GHz Delay-Locked Loop in 90nm CMOS Technology"
"A World-band Triple-mode 802.11a/b/g SOC in 0.13um CMOS"
"A Low-Power 0.7-V H.264 720p Video Decoder"
"A 1.12pJ/b Resonance Compensated Inductive Transceiver with a Fault-Tolerant Network Controller for Wearable Body Sensor Networks"
"A 1.8ns Random Cycle SRAM-interface High-speed DRAM (SH-RAM) Compiler with Data Line Replica Architecture"
"A Low Power IA Processor for Mobile Internet Devices in 45nm Hi-K Metal Gate CMOS"
Plenary Talks
Mr. Yoshiaki Kushiki (Senior Fellow, Matsushita Electric Industrial, Japan)
"Aiming for an Environmental-Oriented CE Platform"
Dr. Young Hwan Oh (President and CEO of Dongbu Hitek Semiconductor, Korea)
" Foundry-Fabless Collaboration for Semiconductor SoC Industry in Korea"
Dr. Bill Krenik (CTO of TI, Wireless Terminals Business Unit, USA)
"4G Wireless Technology: When will it Happen? What does it Offer?"
Panel Discussions
"SiP2.0: What, When, and How?”
| Moderator: | Masayuki Mizuno, (NEC) |
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| Panelists : | R. Woo (LG), Y. Urakawa, (Toshiba),M. Miyamoto (Sharp), K. Asai (Renesas), |
Digitally Assisted Analog and RF Circuits: Potentials and Issues”
| Moderator: | Asad A. Abidi, (UCLA) | |
| Panelists : | B.-S. Song (UCSD), J. Dawson (MIT), Van der Plas Geert (IMEC), B. Murmann (Stanford Univ.) T.-C. Lee, (NTU) |
Special Lecture
"How to Write a Good JSSC Paper" Bram Nauta (Twente Univ.)
Industrial Program
In the industry program, papers on cutting-edge IC products are presented with application, designed measurement information. There are two parallel sessions with 8 papers from Mediatek (Taiwan), Sharp (Japan), Kawasaki Microelectronics (USA), Toshiba (Japan), IBM Semiconductor R&D (USA), Intel (USA) Samsung (Korea) and Rambus (USA).
Student Design Contest
11 outstanding chip designs from the accepted student papers will make real demonstrations on the conference site with authors’ explanation. The best student design will be selected among those 11 demonstrations reflecting the high research standards of Asian academies.
Tutorials
"Design of Femto-joule Energy Efficient ADCs in CMOS"
Geert Van der Plas (IMEC)
"Advanced SiP Design"
Joungho Kim (KAIST)
"Advanced Clock Distribution System"
Simon Tam (Intel)
"Economic and Design Choices for Nano-scale Electronic Systems"
Siva Narendra (Tyfone Inc.)
