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Student Design Contest

Guidelines for Student Design Contest (PDF 246 KB)

Information

15 outstanding chip designs reflecting the high research standards of Asian as well as worldwide academies were selected among the accepted student papers and honorably invited to demonstrate their design results on the conference site with poster. Based on the on-site demonstration results, 3 best student designs will be selected and awarded. The other participants will be honored by A-SSCC SDC certificates.

Student Papers at A-SSCC 2012 Student Design Contest

Time: 16:00 - 18:30, November 12

  • A 1.55mW Mixed-Signal Integrating Mixer for Direct Spectrum Estimation in 0.13um CMOS
    Kevin Banovic, University of Toronto, Canada
  • A Built-in Self-Adjustment Scheme with Adaptive Body Bias Using P/N-Sensitive Digital Monitor Circuits
    A.K.M Mahfuzul Islam, Kyoto University, Japan
  • Monitoring Effective Supply Voltage Within Power Rails of Integrated Circuits
    Takeshi Okumoto, Kobe University, Japan
  • A 40nm CMOS Full Asynchronous Nano-Watt SAR ADC with 98% Leakage Power Reduction by Boosted Self Power Gating
    Ryota Sekimoto, Keio University, Japan
  • Ultrasonic Imaging Front-End Design for CMUT: a 3-Level 30Vpp Pulse-Shaping Pulser with Improved Efficiency and a Noise-Optimized Receiver
    Kailiang Chen, MIT, USA
  • A 40 nm 535 Mbps Multiple Code-Rate Turbo Decoder Chip Using Reciprocal Dual Trellis
    Chen Yang Lin, National Chiao Tung University, Taiwan
  • A Package Bondwire Based 80% Efficiency 80MHz Fully-Integrated Buck Converter with Precise DCM Operation and Enhanced Light-Load Efficiency
    Cheng Huang, The Hong Kong University of Science and Technology, Hong Kong
  • A 101 dB DR 1.1 mW Audio Delta-Sigma Modulator with Direct-Charge-Transfer Adder and Noise Shaping Enhancement
    Tao Wang, Oregon State University, United States
  • A 245 GHz, 2.6mW/Pixel Antenna-Less CMOS Imager with 0.7fW/Hz05 Nep and 3.5m Backscattered Range
    Adrian Tang, UCLA, United States
  • A Multi-Phase Multi-Frequency Clock Generator Using Superharmonic Injection Locked Multipath Ring Oscillators As Frequency Dividers
    Amr Hafez, UCLA, United States
  • Performance and Side-Channel Attack Analysis of a Self Synchronous Montgomery Multiplier Processing Element for RSA in 40nm CMOS
    Benjamin Devlin, The University of Tokyo, Japan

General Guidelines

  • The SDC session is intended to provide an interactive demonstration of excellent student designs. Authors can demonstrate their design results, operations and detail concepts vividly to the conference participants.
  • Authors should bring their chip and test/demonstration equipments to the conference site to demonstrate their design results during the conference period; from the first day till the second day of the conference (The first day (Nov. 12) demonstration is very important because the award winners are determined by the demonstration review on the first day).
  • The operation of the chip will be demonstrated by showing the important waveforms verifying the design concepts or by showing visual criterions for the performance of the chip.
  • Although it is not recommended, the authors may bring the test result data stored in the notebook and replay them at the conference site instead of the real demonstration.
  • Most of the test equipments necessary for the demonstration should be brought by the authors themselves (The notebook type test equipment is recommended). However, if you need any special equipment for the on-site demonstration, please contact the SDC chair, Prof. Shiho Kim (shiho@yonsei.ac.kr) or Prof. Masaki Hirata (m-hirata@fc.ritsumei.ac.jp) at your earliest convenience.
    *Presenters are responsible to pay off special equipment fee prior to the conference. Please contact the A-SSCC Secretariat for detail payment information.
  • The poster boards are prepared to attach the posters in portrait format with a maximum size of 70 inches (height) by 36 inches (width) (1 inch=2.54 cm). Posters have to be attached to the boards using adhesive tape (available on site). The poster should allow the attendees to recognize the key points of the work easily from a distance of at least 10 feet (3 meters) and to facilitate more detailed discussions with the authors. Often the best poster comprises a few large significant graphs/illustrations annotated clearly with only enough text to headline key points like purpose, conclusions, and impact. Note that the poster should not consist of a copy of the manuscript.
  • If You need to ship the materials, please ship to the following address:
      Kobe International Conference Center
      6-9-1 Minatojima-nakamachi, Chuo-ku,
      Kobe 650-0046, JAPAN
      Tel: +81-78-302-6485
      ATTN: ASSCC-2012 SDC(11/12-11/14) at Reception Hall
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Specific Guidelines

  • A 1.83m X 0.45m X 0.76m (Length X Width X Height) platform will be placed in front of the each poster board for the design demonstration. Power socket and wireless internet will also be provided.
  • Please prepare a self complete test board in order to avoid the necessity of the external test equipment such as the function generator or large oscilloscope.
  • An area 12 in. high and 9 in. wide in the top left corner of the poster board will be used for poster identification.
  • The poster will typically consist of a number of 8.5 x 11 in. or A4 pages tacked to the bulletin board, although larger paper formats are acceptable and even desirable.
  • One page is to consist of the paper title, authors and affiliation.
  • A second page is to consist of a brief abstract outlining the key points of the paper.
  • Use a minimum font size of 18 points for text and 30 points for headings.
  • Limit text to 4-6 key points per page.
  • Limit graphs or illustrations to 2 per page.
  • Appropriate use of color is encouraged.
  • Electric Outlet: 100V